Development of novel CNN accelerator architecture and design methodology that breaks away from the commonly accepted practice.
Deep convolutional neural networks (CNNs) are rapidly becoming the dominant approach to computer vision and a major component of many other pervasive machine learning tasks
Developed is a novel CNN hardware accelerator with a new architecture and design methodology. Modified is the order in which the original input data are brough on to the chip.Design approach is a pyramid-shaped multi-layer sliding window, allowing effective on-chip caching during evaluation. Caching in turn reduces the off-chip memory bandwidth requirements.
Proposed technology is an improvement in energy efficiency by minimizing data movements and improving performance. CNN accelerator architectures that focus on the dataflow across convolutional layers.
US Provisional Filed
We seek to develop and commercialize, by an exclusive or non-exclusive license agreement and/or sponsored research, with a company active in the area.
Available for License
Computer Science, Electrical and Computer Engineering
CNN, Deep Learning, Convolutional Neural Networks, FPGA, GPU, Accelerator
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