Manufacturing Method for Ultra-high Solid State Capacitance Capacitors
The method involves the fabrication of very high surface area electrodes with a small foot-print area and specialized dielectric between the two electrodes. The dielectric is a solid-state laminate of at least two materials with very high dielectric constant and dielectric strength. The former leads to high capacitance and the latter to high breakdown voltage. The high surface area electrodes are formed using a template of small holes in a substrate with material layers deposited on a three-dimensional template. A conducting layer is deposited that is then covered with the dielectric followed by another conducting layer. The two conducting layers form the capacitor’s two electrodes and have independent external contacts. The use of the template vastly increases the capacitor's surface area in an efficient, cost-effective manner. The method fabricates the dielectric in as thin and continuous of a coating as possible while providing the best trade-off of capacitance and breakdown voltage. The capacitor cells formed in this way have especially high specific capacitance and breakdown voltage. The method significantly decreases the number of capacitor cells required to achieve a given value of capacitance. The higher breakdown voltage results in higher operating voltage, and thus, minimized leakage currents.
-Dielectric can be much thinner and thereby produce higher specific capacitance.
-The method is compatible with processes that deposit multiple layers of different ceramics resulting in laminates that result in higher dielectric constants and breakdown voltages.
-The method is compatible with lower temperature processes that are easier and less costly.
Binghamton University RB585